Fall 2012 Term Ends

This morning was my final exam in the C programming course for electrical engineers. We started with 7; only 3 completed the course; only I submitted the final project: basic BMP editor that opens a BMP and offers to create negative, blueshift, redshift, greenshift, and variable intensity versions that are written to file.

Earlier I finished physics and circuits.

I earned As in all three classes, so I am pretty happy; I am also very ready to enjoy some time off.

Up/Down Timer Circuit Video

Here's a short movie of the timer circuit that I designed in Altera® Quartus 9.1 Web Edition. I downloaded it to the Altera USB Blaster FPGA (with a Cyclone II chip) to demonstrate it for my class. The video was shot with my iPod, so it is not very smooth.

It took me some time to edit and format the video: I had never before used iMovie or uploaded anything to YouTube. The current guidelines YouTube provides for exporting content from iMovie are clear.

It took too long for the initial iMovie-export QuickTime version to load, so I chucked it.

Timer Circuit

The other day I completed the final project circuit for Digital Fundamentals, EECT112. This is my first real electronics course, so it has been difficult; most of the other students have had other courses before.

When presented with a choice for the final project, I chose to make a time with seven-segment LED display. Originally I thought to have just a three-bit input that would count down, which would require that I learn better how to perform subtraction with circuits. In the end, I used counter ICs, since I began to run out of time for the initially quite complex task I had set for myself.

My timer has an SR flip-flop to reset the counter; the two counter ICs (for two four-bit BCD input) output a high to signal that the maximum up- or down-count has been reached. I used that to reset the flip-flop so the counter would not loop. There are LEDs that signal whether the timer counts up or down and whether it is currently counting.

When one holds down the push button, throwing the switches causes the seven-segment LEDs to show changes. Releasing the button starts the timer.


The hardest part of the project was the clock. I tried to use the FPGA's 50MHz clock and divide it down by 50 million, that introduced too much propagation delay. An external clock--an oscilloscope, actually--was my savior.

This was a neat project, but I wish I could have done it in VHDL, since using the schematic capture of Quartus can be problematic.

Altera Code Samples

For my Digital Fundamentals course, we use an Altera FPGA with a Cyclone II chip on it. My final project is to build a timer, which I want to set with 4-bit binary input from switches; the decrementing seconds should got to 7-segment LEDs. I've been searching about and found that Altera provides plenty of source VHDL code to start with.

Thank, Altera!

Fall Break

The end of my mechanics LAN marked the start of the week-long fall break at Ivy Tech. A number of things have piled up, notably final projects for two classes: C and digital circuits. This break will be quite busy.

Fall Break

The end of my mechanics LAN marked the start of the week-long fall break at Ivy Tech. A number of things have piled up, notably final projects for two classes: C and digital circuits. This break will be quite busy.

Projects & Tests

Friday concluded the midterm tests. I got As on both the exam and lab test for Digital Fundamentals; for the C test Friday, an A is highly probable.

Both courses have final projects. The C course's project will be to read a graphic file and offer operations like making a (photographic) negative, adjusting saturation, tweaking the individual RGB values, and encoding. I've not processed images before, so it should be quite interesting.

The other course's project is to make a timer with logic gates and display the 4-bit value countdown in a 7-segment LED.

These will be difficult projects, but they should teach me much and be enjoyable. I look forward to completing them.

Today in EECT112

Today was our second exam, which was split into two parts: test and lab. It was heavy on Boolean logic, with reduction, Karnaugh maps, and symbolic designs. Plenty of questions about the rules of Boolean logic and using NOR and NAND to make other gates.

We also received paperwork about our projects, which constitute 13% of our grade. I need to think about what I want and can do with my circuitry knowledge. I like the ASCII to 7-bit display, but a timer would be neat, too.

Programming an FPGA

Last Tuesday in my "Digital Fundamentals" lab, we wrote up a Boolean logic equation involving an AOI. In Quartus, we drew the equation as a schematic and wrote the VHDL. After compiling, creating the waveform, and running the simulation, we attached an FPGA through a USB cable to program it.

The design was to send a high signal for odd numbers to 9. We thus wired switches to be thrown as binary values. If odd, up to 9, an LED came on. Not terribly complex, but from small things come greater things.